Error-correcting codes are well known. One form of error-correcting code is a Turbo Code. There are various forms of Turbo Codes. However, it should be appreciated that although Turbo Codes are described, other types of error-correcting codes based on use of a discrete power series having symmetry about at least one term may be used. Notably, the terms “code,” “codes,” and “coding” as used herein may refer to either or both encoding and decoding.
Turbo Code encoders and decoders conventionally include an interleaver. These interleavers may be premised on use of prime numbers, and are sometimes referred to as “Prime Interleavers.” Such interleavers may also be referred to as Turbo Interleavers. Use of Turbo Interleavers is called for by various organizations, including the 3rd Generation Partnership Project (“3GPP”) and Universal Mobile Telecommunications System (“UMTS”), among other known organizations.
As suggested by 3GPP, a Turbo Interleaver may be implemented as a number of offset indices into a single discrete power series (“the Svector”). For implementation of such a Turbo Interleaver, a number of discrete power series (“QSvectors”) may be obtained from the Svector and used to generate read addresses. Depending on blocksize of the Turbo Code interleave, the QSvectors may for example be 5, 10, or 20 discrete power series, or sub-series with respect to the Svector. Unfortunately, generating such a single series and such offset indices may be a time-consuming calculation as well as consuming a substantial amount of memory.
Furthermore, multi-channel Turbo Interleaver likewise uses QSvectors; however, such a multi-channel Turbo Interleaver may generate interleave read addresses at multiple locations within an interleave read address sequence. As discrete power series for Turbo Codes may be pseudo random, computing multiple locations in the QSvectors may be time consuming.
Accordingly, it would be both desirable and useful to provide means that reduces one or more of the above-described obstacles to vector generation from a discrete power series symmetric about at least one term.